Tessera R²

Technical Reference Manual 技术参考手册

REVISION校订 13
9 August 2016

Legal 法律声明

This information is the property of Brompton Technology and its licensors. It should be treated as confidential information. It is permitted to use this information in whole or in part when designing products that will work with Brompton Technology protocols or processing and by using this information you accept these terms and conditions. This information is provided without any representation or warranty concerning its suitability for your application or concerning the performance or results you may obtain by relying upon it. Brompton Technology does not warrant that this information is error-free or that defects will be corrected. In no event (and to the greatest extent permitted by law) will Brompton Technology or its licensors be liable for any damages arising out of the use of this information in whole or in part.

本文档信息归属 Brompton Technology 及其许可者所有。文档内容应被视为机密信息。在设计符合及应用 Brompton Technology 处理及通讯协议的产品或生产过程中，允许使用本文档的全部或部分信息。使用该文档即代表您接受这些条款。对于该信息在您实际应用过程中之适用性我公司不作任何承诺和担保，对于您使用该信息可能产生之情况或后果我公司亦不负任何责任。Brompton Technology 不承诺信息内容中不含错误或将改正缺陷。在任何情况下（且在法律允许的最大范围内），对于因使用全部或部分文档信息而造成之任何损失，Brompton Technology 或其许可者均不承担任何责任。

Note the information in this document is preliminary and subject to change without warning.

本文档所涉及内容为草案信息，如有变更恕不另行通知。

Introduction 简介

R² is the new receiver card for Tessera LED Processing. With a nominal 64K pixel capacity, R² is suitable for many types of panels, including very high resolution panels. R² also includes Tessera's full feature set - see www.bromptontech.com/tessera#features for details.

R² 是 Tessera LED 视频处理之新型接收卡。其额定像素容量为 64K，支持极高分辨率，适用于各类 LED 显示屏。R² 支持使用 Tessera 之整套功能 - 详见 https://www.bromptontech.com/tessera#features。

At just 68x32mm R² is up to 6 times smaller than its predecessors and has just a single connection along the edge of the circuit board. It plugs into DDR2 SO-DIMM sockets that are widely and cheaply available. As such it can be integrated directly onto a panel's hub or spine board for the smallest and lowest-cost solution. Alternatively a simple carrier board can be used to adapt R² to match other common form factors for compatibility with existing desings.

R² has been engineered for value and designed to remove unnecessary duplication of connectors and circuitry in a panel's design, giving a cost-effective overall solution.

相对其上一代产品尺寸小6倍之多，R² 之尺寸仅有 68x32 mm。搭配使用常见且价格低廉的 DDR2 SO-DIMM 插槽，可直接集成到显示屏转接板或脊板上，成为尺寸最小、成本最低的产品方案。另外，采用转接板可使 R² 与其它常见规格相匹配，从而实现其与现有设计之兼容。

R² 旨在移除显示屏设计中不必要之接口及电路，从而提供具有成本效益的整体性解决方案。

Terminology 术语

Panel - Single mechanical unit, usually consisting of several modules, a PSU, a controller card and external power and data connectors.
Module or LDM (LED display module) - A single circuit board that houses LEDs and constitutes part of the face of the panel.
Controller card or Receiver card or Card - The card (R²) that is responsible for receiving Ethernet (or similar) data signals and distributing pixel data to the LED driver chips.
Hub board or Spine board - A simple board that is often used for signal distribution and to interface between the controller card and LED modules.

显示屏 - 单个机械装置，通常包含若干模组、一个供电器、一个接收卡、外部电源和数据接口。
模组或LDM（LED 显示模组） - 由 LED 构成的单个电路板，显示屏之显示平面单元。
控制卡或接收卡或卡 - 指 R²，用于接收以太网（或同类）数据信号并向 LED 驱动 IC 分配像素数据。
转接板或脊板 - 用于分配信号以及连接接收卡和 LED 显示模组的电路板。

Mechanical 机械特性

The Tessera R² card is compatible with the standard 200-pin DDR2 SO-DIMM form factor, designed to be installed in readily-available SO-DIMM sockets. All connections (inclduing two Gigabit Ethernet interfaces, signals to the LED drivers, and user interface signals) are on the 200-pin gold-plated edge connector. A mounting hole is provided for additional mechanical security and thermal coupling The top side of the R² card is shown in .

The card must be secured in its socket before power is applied. R² cards must not be hot-plugged.

A clearance of at least 3.0mm is required on either side of the board, as shown in . Components should not normally be placed underneath the R² card on the carrier PCB. It is recommended that reverse-mounting connectors, which place the top side of the R² as shown in face-down next to the carrier PCB, should not be used.

Tessera R²接收卡采用标准 200 针 DDR2 SO-DIMM 规格，可安装于广泛使用的 SO-DIMM 插槽中。所有信号接点（包括两个千兆以太网接口、LED 驱动 IC 信号、用户界面信号）均在该 200 针金边接口上。R²接收卡正面俯视图如所示。图示安装孔可用于机械固定和热耦合。

通电之前必须将卡插入卡槽。R² 接收卡严禁热插拔。

接收卡正反两侧皆应至少留有 3.0 mm 间隙，如所示。正常情况下，转接板印刷电路的电子元件不得焊置于 R²接收卡下面。建议不要反向安装 SO-DIMM 插槽，所示之R²正面应为安装正面。

Pin Outs 引脚分布

R² supports two different pin outs - LVCMOS mode and LVDS mode - which are described in and respectively. Note that pin roles from LVDS and LVCMOS modes cannot be mixed, pins should be used entirely in one mode or the other.

R² 支持两种不同的引脚模式 - LVCMOS 模式和 LVDS 模式-分别在表和表中介绍。请注意表中定义的 LVDS 与 LVCMOS 模式之引脚作用不能混淆，所有引脚必须完全使用两种定义中之一种。

LVCMOS Mode 模式	#		#	LVCMOS Mode 模式
do not connect 不可连接	1		2	do not connect 不可连接
do not connect 不可连接	3		4	do not connect 不可连接
do not connect 不可连接	5		6	do not connect 不可连接
ETH_0_SHIELD	7		8	ETH_1_SHIELD
ETH_0_SHIELD	9		10	ETH_1_SHIELD
do not connect 不可连接	11		12	do not connect 不可连接
do not connect 不可连接	13		14	do not connect 不可连接
do not connect 不可连接	15		16	do not connect 不可连接
ETH_0_MDI[0]+	17		18	ETH_1_MDI[0]+
ETH_0_MDI[0]-	19		20	ETH_1_MDI[0]-
do not connect 不可连接	21		22	do not connect 不可连接
ETH_0_MDI[1]+	23		24	ETH_1_MDI[1]+
ETH_0_MDI[1]-	25		26	ETH_1_MDI[1]-
do not connect 不可连接	27		28	do not connect 不可连接
ETH_0_MDI[2]+	29		30	ETH_1_MDI[2]+
ETH_0_MDI[2]-	31		32	ETH_1_MDI[2]-
do not connect 不可连接	33		34	do not connect 不可连接
ETH_0_MDI[3]+	35		36	ETH_1_MDI[3]+
ETH_0_MDI[3]-	37		38	ETH_1_MDI[3]-
do not connect 不可连接	39		40	do not connect 不可连接
	--	---	--
do not connect 不可连接	41		42	do not connect 不可连接
do not connect 不可连接	43		44	do not connect 不可连接
do not connect 不可连接	45		46	do not connect 不可连接
do not connect 不可连接	47		48	do not connect 不可连接
GND	49		50	GND
ETH_1_LED_LINK	51		52	ETH_0_LED_LINK
ETH_1_LED_ACTIVITY	53		54	ETH_0_LED_ACTIVITY
GND	55		56	GND
do not connect 不可连接	57		58	do not connect 不可连接
FACTORY_BOOT_N	59		60	do not connect 不可连接
GND	61		62	GND
I2C_1_SDA	63		64	I2C_0_SDA
I2C_1_SCL	65		66	I2C_0_SCL
GND	67		68	GND
V_OUT_2.5	69		70	V_OUT_2.5
V_OUT_2.5	71		72	V_OUT_2.5
GND	73		74	GND
I2C_INT	75		76	LED_DATA[0]
LED_DATA[32] or RESERVED_GPIO[5]	77		78	LED_DATA[1]
GND	79		80	GND
LED_DATA[33] or RESERVED_GPIO[6]	81		82	LED_DATA[2]
UI_TEST_BUTTON_N or RESERVED_GPIO[0]	83		84	LED_DATA[3]
GND	85		86	GND
RESERVED_GPIO[1]	87		88	LED_DATA[4]
UI_STATUS[1] or RESERVED_GPIO[2]	89		90	LED_DATA[5]
GND	91		92	GND
UI_STATUS[2] or RESERVED_GPIO[3]	93		94	LED_DATA[6]
UI_STATUS[3] or RESERVED_GPIO[4]	95		96	LED_DATA[7]
GND	97		98	GND
CAL_I2C_SPI[0]	99		100	LED_DATA[8]
CAL_I2C_SPI[1]	101		102	LED_DATA[9]
GND	103		104	GND
CAL_I2C_SPI[2]	105		106	LED_DATA[10]
CAL_I2C_SPI[3]	107		108	LED_DATA[11]
GND	109		110	GND
CAL_I2C_SPI[4]	111		112	LED_DATA[12]
CAL_I2C_SPI[5]	113		114	LED_DATA[13]
GND	115		116	GND
CAL_I2C_SPI[6]	117		118	LED_DATA[14]
CAL_I2C_SPI[7]	119		120	LED_DATA[15]
GND	121		122	GND
CAL_I2C_SPI[8]	123		124	LED_DATA[16]
CAL_I2C_SPI[9]	125		126	LED_DATA[17]
GND	127		128	GND
LED_SCAN[4]	129		130	LED_DATA[18]
LED_SCAN[0]	131		132	LED_DATA[19]
GND	133		134	GND
LED_SCAN[1]	135		136	LED_DATA[20]
LED_SCAN[2]	137		138	LED_DATA[21]
GND	139		140	GND
LED_SCAN[3]	141		142	LED_DATA[22]
LED_LATCH	143		144	LED_DATA[23]
GND	145		146	GND
LED_DATA[34] or RESERVED_GPIO[7]	147		148	LED_DATA[24]
LED_DCLK_A	149		150	LED_DATA[25]
GND	151		152	GND
LED_DCLK_B	153		154	LED_DATA[26]
LED_DATA[35] or RESERVED_GPIO[8]	155		156	LED_DATA[27]
GND	157		158	GND
LED_GCLK	159		160	LED_DATA[28]
BUFFER_OE_N	161		162	LED_DATA[29]
GND	163		164	GND
BUFFER_DIR	165		166	LED_DATA[30]
LED_DISCHARGE	167		168	LED_DATA[31]
GND	169		170	GND
VIRTUAL_FF_CLK_A	171		172	REBOOT_N
VIRTUAL_FF_CLK_B	173		174	do not connect 不可连接
GND	175		176	GND
do not connect 不可连接	177		178	DEBUG_V_OUT_1.8
do not connect 不可连接	179		180	V_IN
GND	181		182	GND
do not connect 不可连接	183		184	V_IN
DEBUG_CDI_TX	185		186	V_IN
GND	187		188	GND
do not connect 不可连接	189		190	V_IN
do not connect 不可连接	191		192	do not connect 不可连接
GND	193		194	GND
do not connect 不可连接	195		196	do not connect 不可连接
do not connect 不可连接	197		198	do not connect 不可连接
GND	199		200	GND

LVCMOS mode pin-out LVCMOS模式引脚

LVDS Mode is not yet available on general release. If you are interested in using LVDS mode in your project please contact us for further information.

LVDS 模式于通用发布中不作说明。若阁下想在项目中使用 LVDS 模式，请联系我们以获取更多信息。

LVDS mode pin-out LVDS模式引脚

Signal Descriptions 信号释义

below gives a brief description of the signals given in and above. These descriptions are not exhaustive - users should refer to the relevant sections and reference designs later in this document for further information.

All unused pins should be left unconnected unless otherwise specified.

关于前文表格同表格所提及介绍之信号，其简要说明如下表格。以下说明并未涵盖全部内容-用户应参阅本文档之相关章节和参考设计以获取更多信息。

除非另行说明，否则所有未使用之引脚均应断路。

The following pins are used in both LVCMOS and LVDS mode pin-outs

以下引脚于 LVCMOS 及 LVDS 模式均有使用

Pin Name 引脚名称	I/O Standard I/O 标准	Description 功能说明
V_IN	Power input 电源输入	All pins labelled V_IN should be connected to the panel's power supply positive terminal (or a derivative thereof). See for the recommended power supply range. 所有带有 V_IN 标记之引脚均应连接至显示屏供应电源的正极端（或其衍生端）。建议供电范围请参见表格
GND	Common 共地回路	All pins labelled GND should be connected to the panel's power supply 0V terminal. 所有带有 GND 标记的引脚均应连接至显示屏供应电源的 0V 端。
V_OUT_2.5	Power output 电源输出	These pins provide a reference voltage for LVCMOS outputs, for example to power the input-side of level shifting circuitry. Significant loads should not be pulled from these pins, see Electrical Specifications for details. If unused these pins should be left unconnected. 此类引脚为 LVCMOS 模式输出提供参考电压，例如为电压位准移位电路输入侧供电。此类引脚不得承受过大载荷，详细请参见电子规范。在不使用时，此类引脚应处于断路状态。
do not connect 不可连接	N/A 不可用	These pins should be left unconnected. They should not be tied to ground or a voltage rail. 此类引脚应处于断路状态。不得接地或任何电压轨。
ETH_x_SHIELD	Ethernet 以太网	Shield for Ethernet interface x. These should be connected to the shield on the connector used for ETH_x_MDI_[y]±. See section for details. 以太网接口 x 的屏蔽线。应接至 ETH_x_MDI_[y]± 对应插头的屏蔽层。详见章节。
ETH_x_MDI_[y]±	Ethernet 以太网	Ethernet Media Dependent Interface signals - pair y for interface x. These should be connected to external connectors to allow users to connect to a Tessera Processor and daisy-chain to other Tessera-enabled panels. All routing and connectors should be rated as suitable for Gigabit Ethernet. See section for details. 以太网专用媒体界面(MDI)信号。如记号所示为接口 x 的线对 y 。应连接至外部插头以允许用户连接至 Tessera 处理器，或菊花链式连至其他使用 Tessera 的显示屏。所有布线与插头均应与千兆以太网搭配。详见章节。
ETH_x_LED_LINK	2.5V output 输出	Active-low 'link established' signal for Ethernet interface x - can optionally be connected to the cathode of an LED for status/debug purposes. Will be low when a Gigabit Ethernet link has successfully been established on the port. See section for details. 以太网接口 x 的‘连接建立’信号。该信号低电平有效，可接至 LED 之负极作状态指示或调试纠错。当千兆位以太网接口成功建立连接时，该信号呈低电平。详见章节。
ETH_x_LED_ACTIVITY	2.5V output 输出	Active-low activity signal for Ethernet interface x - can optionally be connected to the cathode of an LED for status/debug purposes. Will be low when Ethernet data is being transmitted or received on the port. See section for details. 以太网接口 x 的‘工作指示’信号。该信号低电平有效，可接至 LED 之负极作状态指使或调试纠错。当千兆位以太网接口传输或接收数据时，该信号呈低电平。详见章节。
FACTORY_BOOT_N	Open drain input 开漏输入	Hold this line low while the card is booting to force the card to boot into factory firmware (recovery) mode. It is strongly recommended that this signal is connected to a technician-accessible push button, but should not normally be user-accessible. It is strongly recommended that this is combined with the REBOOT_N signal - see section for a reference design. If this pin is not used it should be left disconnected. 当接收卡启动时，将该信号端长置低电平可使接收卡还原至出厂固件（出厂修复模式）。强烈建议将此信号接为技术员按钮为修复之用，而非用户功能按钮。强烈建议将该信号与 REBOOT_N 相联使用，设计参考请参阅章节。若设计不使用该引脚，应使其处于断路状态。
REBOOT_N	Open drain input 开漏输入	Briefly pull this line low to make the card reboot. It is strongly recommended that this signal is connected to a technician-accessible push button, but should not normally be user-accessible. It is strongly recommended that this is combined with FACTORY_BOOT_N using an RC-timer circuit - see section for a reference design. This pin is open-drain, so should not be driven high, only driven low or left floating. If this pin is not used it should be left disconnected. 于该引脚短置低电平将使接收卡重启。强烈建议将此信号接入技术人员按钮，而非用户功能按钮。强烈建议该信号与 FACTORY_BOOT_N 以 RC 定时电路相联使用，设计参考请参阅章节。此引脚为开漏输入，不应加置高电平，只能接低电平或悬空。若设计不使用该引脚，应使其处于断路状态。
DEBUG_x	1.8V output 输出	These pins are used for firmware debugging. To speed up panel development it is strongly recommended to connect this to a debug header - see section for a reference design. These pins must only be used as described in the reference design, and otherwise left unconnected. 此类引脚用于固件调试。为加快开发速度，强烈建议连接该引脚至专用调试管座 - 详见章节参考设计。该类引脚仅应以参考设计所述连接，否则应处于断路。
I2C_x_SDA, I2C_x_SCL	Open drain bidirectional. 开漏双向	I2C buses for external devices. See section for details. These buses will typically be operated at 100kHz. These pins are open-drain, so should only be driven low or left floating. These pins should be pulled high with a 4K7 resistor, including if they are unused. 用于外置设备的 I2C 总线，其典型工作频率为 100kHz，详见章节。此类引脚为漏极开路，只能接低电平或悬空。设计中应使用 4K7 上拉电阻拉至高电平，即使在引脚不使用的情况下。
I2C_INT	2.5V input 输入	Interrupt for external devices. See section for details. If this pins is unused it should be tied low. 外部设备之中断信号。详见章节。该引脚于不使用时应接低电平。
RESERVED_GPIO[x]	2.5V input/output 输入/输出	These optional signals are used for panel-specific features. Please contact us for details. If unused these pins should be left unconnected. 该类信号引脚可实现显示屏之特有功能。请联系我们以获取更多信息。该类引脚于不使用时应处于断路状态。
UI_TEST_BUTTON_N	2.5V input 输入	Active-low user interface test button signal. When held low for 3 seconds the controller card will enter/exit test pattern mode. Brief low pulses are used to change patterns while in test pattern mode. This pin can optionally be connected to a user-accessible push button. When not used this pin should be tied high. See section for details. 用户界面测试按钮信号。该信号低电平有效，保持低电平 3 秒接收卡将进入或退出测试图样模式。于测试图样模式下，短促低电平脉冲将切换测试图样 - 此引脚可接出为用户功能按钮。该引脚于不使用时应接高电平。详见章节。
UI_STATUS[x]	2.5V bidirectional. 双向	User interface status indicator signals, for example for controlling status LEDs. See section for further details. 用户界面状态指示信号，可接为状态指示 LED。详见章节。

The following pins are used in LVCMOS mode pin-out only

以下引脚仅于 LVCMOS 模式中使用

Pin Name 引脚名称	I/O Standard I/O 标准	Description 功能说明
CAL_I2C_SPI[x]	2.5V bidirectional. 双向	These signals can be used as an I2C or SPI interface to storage devices (such as EEPROM or flash) holding calibration data. See section for further details. 校正数据存储设备（如 EEPROM 或闪存）之 I2C 或 SPI 界面接口信号。详见章节。
LED_DATA[x]	2.5V output 输出	Data signals to be connected to the data input of the first LED driver IC in chain x. These signals may be used in any order, unused pins should be left unconnected. See for details. 连接至数据输入端数据链 x 第一个驱动 IC 的数据信号。此类信号可以任意顺序使用，未使用之引脚应该保持断路。详见章节。
LED_SCAN[x]	2.5V output 输出	Scan multiplex control signals, common to all driver IC chains. If fewer than the maximum number of LED_SCAN lines are required these signals should be used in ascending order. For example for 4:1 scan multiplexing, LED_SCAN[0] and LED_SCAN[1] should be used. Unused pins should be left unconnected. See for details. 多路控制扫描信号，为所有驱动器 IC 链共有。如果所需数量低于 LED_SCAN 线路的最大数目，应按升序使用此类信号。例如，4:1 扫描多路复用需要使用 LED_SCAN[0] 和 LED_SCAN[1]。未使用用之引脚应处于断路状态。详见章节。
LED_LATCH	2.5V output 输出	Data latch signal common to all LED driver IC chains. See for details. 数据锁存信号，为所有 LED 驱动 IC 链所共有。详见章节。
LED_DCLK_x	2.5V output 输出	Data clock signal. Where virtual channels are not being used LED_DCLK_A should be connected to all driver IC chains and LED_DCLK_B should be left unconnected. Where virtual channels are being used, both LED_DCLK_x signals are required - see for details. 数据时钟信号。若不使用虚拟通道， LED_DCLK_A 应连接至所有的驱动 IC 链，而 LED_DCLK_B 则应处于断路状态。若使用虚拟通道，则 LED_DCLK_x 信号两者皆需使用 - 详见章节。
LED_GCLK	2.5V output 输出	Greyscale clock signal common to all driver ICs. When non-PWM-enabled driver ICs are used this signal acts as an active-low output enable signal. See for details. 灰度控制时钟信号，为所有驱动 IC 所共有。当使用非 PWM 驱动 IC 时，该信号用途则为低电平有效之输出致能信号。详见章节。
LED_DISCHARGE	2.5V output 输出	Sometimes known as SR or Scan Reduce. Active-high discharge signal, asserted during the period between scan bank switches. This signal can optionally be used to discharge power supplies on modules for ghosting elimination. 亦作扫描消减或 Scan Reduce (SR)。放电信号，高电位有效。于扫描组转换过程中为高电平（信号生效）。该信号可用于模组电源放电以消除重影。
BUFFER_OE_N/DIR	2.5V output 输出	Optional signals for controlling logic buffers connected to LED_* signals. See for details. 可选信号，用以控制连接到 LED_* 信号的逻辑缓冲寄存器。详见章节
VIRTUAL_FF_CLK_x	2.5V output 输出	Flip-flop clock signals to be used in virtual channels mode. See section for details. If not using virtual channels, leave these pins disconnected. 用于虚拟通道模式的触发器时钟信号。详见章节。若不使用虚拟通道，该类引脚应处于断路状态。

Signal descriptions 信号释义

Electrical Specifications 电气特性

Recommended Operating Conditions 建议工作条件

Symbol 符号	Parameter 参数	Min 最小值	Typ 典型值	Max 最大值	Units 单位	Notes 备注
V_IN	Nominal power supply voltage on V_IN pins V_IN 引脚标称供电电压	3.3	5.0	5.0	V	Temporary ±10% variation from nominal min/max permitted. 相对标称值允许短暂 ±10% 偏差。
I_IN	Current consumption on V_IN pins V_IN 引脚电流		1.0	TBC 待定	A	Measured at V_IN=5.0 V. V_IN=5.0 V 之测量值。
I_IN	Current consumption on V_IN pins V_IN 引脚电流		TBC 待定	TBC 待定	A	Measured at V_IN=3.3 V. V_IN=3.3 V 之测量值。
V_{OUT_2.5}	Output reference voltage on V_OUT_2.5 pins V_OUT_2.5 引脚输出参考电压		2.5		V
I_{OUT_2.5}	Permitted current consumption on V_OUT_2.5 pins V_OUT_2.5 引脚允许电流			50	mA
VIH_LVCMOS	Input high voltage threshold on all LVCMOS inputs 所有 LVCMOS 输入之高电压阈值	1.7			V
VIL_LVCMOS	Input low voltage threshold on all LVCMOS inputs 所有 LVCMOS 输入之低电压阈值			0.7	V
VOH_LVCMOS	High level output voltage on all LVCMOS output 所有 LVCMOS 输出之逻辑输出高电平	2			V
VOL_LVCMOS	Low level output voltage on all LVCMOS output 所有 LVCMOS 输出之逻辑输出低电平			0.4	V
IOL_LVCMOS	Sink current on LVCMOS outputs (except ETH_x_LED_y pins) LVCMOS 输出之灌电流（除 ETH_x_LED_y 外）			1.0	mA
IOH_LVCMOS	Source current on LVCMOS outputs (except ETH_x_LED_y pins) LVCMOS 输出之拉电流（除 ETH_x_LED_y 外）			1.0	mA
IOL_{ETH_LED}	Sink current on ETH_x_LED_y pins ETH_x_LED_y 引脚灌电流			2.0	mA
t_{REBOOT_N}	REBOOT_N low pulse width REBOOT_N 低电平脉冲宽度	2.0			µs

Recommended electrical conditions 建议电气条件

Absolute Max Conditions 绝对最大条件

Symbol 符号	Parameter 参数	Min 最小值	Typ 典型值	Max 最大值	Units 单位	Notes 备注
VI_LVCMOS	Input voltage on all LVCMOS inputs 所有 LVCMOS 输入端之输入电压	-0.3		3.6	V

Absolute maximum electrical conditions 极大电气条件

Thermal Considerations 散热

Like any electronic components, it is important that R² is not allowed to overheat. How this is achieved will depend largely on the panel's design and other components in the panel such as the PSU and driver ICs. The power consumption of the R² can be calculated from the values given in . Panel designs therefore should take into account the need to dissipate this energy as heat.

To aid with thermal dissipation from the R² card itself, the card should be mounted to 0V refererence plane on the carrier board using a metal spacer/fixings.

与其他电子元件一样，R² 不应出现过热情况，显示屏设计应考虑散热问题。散热效率取决于设计中的电子元件布局，供电单元（PSU）及驱动 IC。R²之功率消耗应依据表格之工作条件值计算。

为助 R² 散热，接收卡应使用金属隔离垫圈及嵌固件安装于转接板的 0V 基准面上。

Boot Process 启动过程

When power is applied to V_IN and REBOOT_N is deasserted (pulled high) the card will begin the boot process.

First the Factory Firmware will be loaded. The Factory Firmware is programmed when the card is manufactured and cannot normally be updated by end-users. It contains a minimal set of features such as firmware reload, but cannot receive video data or illuminate panels. Normally the Factory Firmware will identify which of two User Firmware banks is the most recent and then proceed to reboot into that bank.

In the unlikely event that a User Firmware bank becomes corrupted, users can force the card to remain in Factory Firmware and do the firmware reload from there. To do this, the FACTORY_BOOT_N should be held low for several seconds after REBOOT_N is deasserted. The boot status indicator led (see ) will flash to confirm that the card is forcibly remaining in Factory Firmware mode.

It is strongly recommended that the REBOOT_N and FACTORY_BOOT_N pins are connected to a technician-accessible push button(s) to allow this factory recovery procedure to be carried out. These should not normally be accessible to end-users. The two signals can be combined using an RC-timer circuit where a brief press will reboot the card and a press-and-hold will reboot the card into factory firmware. For an example, see .

对 V_IN 供电且置高电平于 REBOOT_N （信号未生效）将启动接收卡。

启动进程将首先载入出厂预设固件。出厂固件于接收卡生产过程编入，通常不由终端用户更新。该固件仅支持接收卡之基本功能，如重载固件等，但不支持视频数据接收或点亮显示屏。正常情况下，出厂固件会识别两个用户固件存储组中较新的一个，并使用较新的用户固件。

若用户固件存储组出现异状，用户可强制使用出厂固件 - 于 REBOOT_N 解除效用后（进入高电平），保持 FACTORY_BOOT_N 低电平数秒。状态指示 LED 将闪烁（见）确认此强制设置。

强烈建议将上述信号 REBOOT_N 和 FACTORY_BOOT_N 连接至技术员按钮（不对终端用户可视）以实现此出厂修复功能。设计可将两者以 RC 定时电路联接，此举可实现 1）短按仅重启接收卡；2）长按重启并使用出厂固件。范例请参考。

Configuration and Firmware Reload 配置及固件重载

When an R² card is first installed into a panel, it must first be programmed with a Configuration using the Tessera Configuration Application. The Configuration tells the card how to control the panel, and includes information such as the number of LEDs and type of LED driver. Configurations are currently written by us - see the section for details.

The Configuration is stored in non-volatile memory inside the R² card, so only needs to be programmed once when the card is first installed into a panel.

Tessera is a continually-evolving system, and periodically we will issue updated firmware for receiver cards to add new features or address issues. End-users can easily update this firmware themselves using a Tessera Processor. The card will check the firmware update against its Configuration, so it is not possible for end-users to damage a panel by accidentally loading incorrect firmware or settings.

All firmware reloads are fail-safe. If the card loses power during a firmware upload, the new firmware will be discarded and the card will continue to use the existing firmware.

首次使用 R² 时须先使用 Tessera Configuration Application （配置程序）设定其配置。配置文件信息包含 LED 数量和 LED 驱动 IC 型号等，用以启用接收卡对显示屏之控制。配置文件目前由我们负责编写 - 详见章节。

配置文件将存放于 R² 卡的非易失性存储器（NVM）当中，因此只需于显示屏首次装卡时执行单次配置即可。

Tessera 系统一直在不断更新改进，定期发布的接收卡更新固件将对不断更新的功能提供支持及解决旧有问题。终端用户可通过 Tessera 处理器轻松进行固件更新。接收卡将检查新载固件及其配置 - 因此用户无需担心因不慎加载不正确的固件或设定而对显示屏造成损坏的情况。

若在更新过程中发生断电，接收卡将废除新载固件并继续使用原有版本。

Debug Header 调试管座

The R2 has a dedicated debug output pin, which is used for testing and debugging firmware or panel integration issues.

The DEBUG_CDI_TX and DEBUG_V_OUT_1.8V pins must be connected to an internal pin header as described in .

调试专用针脚可用于 R² 测试同作固件调试及 R² 整合测试。

DEBUG_CDI_TX 及 DEBUG_V_OUT_1.8V 针脚必须参照所述，连接至内置管座。

Tessera Protocol Ethernet Ports Tessera协议以太网端口

R² cards are connected to Tessera Processors by the Tessera Protocol, which operates on top of standard 1000BASE-T Gigabit Ethernet, as defined in IEEE 802.3. For optimum performance, any internal routing, cabling and connectors between the card's Ethernet pins (ETH_x_MDI[y]±) and the panel's external connectors should be standards-compliant.

The two Ethernet ports on the R² - ETH_0_MDI[y]± and ETH_1_MDI[y]± - are identical and can be daisy-chained to other cards in either direction. There are no restrictions on the cabling topology that users use to connect panels to the processor. Tessera Processors provide a means of automatically detecting cabling topology - see Tessera system documentation for further details.

The ETH_x_MDI[y]± signals are isolated from the rest of the R²'s electronics, and this isolation should be maintained in the panel's other circuit boards. The ETH_x_SHIELD signals should be connected to the shield on the external Ethernet connectors.

R² 通过 Tessera 协议与 Tessera 处理器构建连接，该协议基于 IEEE 802.3 中所规定之标准 1000BASE-T 千兆以太网。为达到最佳性能，所有以太网引脚 (ETH_x_MDI[y]±) 之间的内外接线及插头必须必须达到标准要求。

R² 上两个以太网端口完全相同，ETH_0_MDI[y]± 与 ETH_1_MDI[y]± 可以任意方向以菊花链方式连接到其它接收卡，对显示屏与处理器之连接所选用之拓扑逻辑结构亦没有任何限制 - Tessera 处理器将自动检测接线拓扑。详信息请参阅 Tessera 系统使用手册。

ETH_x_MDI[y]± 信号与 R² 的其余电子部件独立隔离 - 其他电路中使用该类信号之处亦须同样处理。 ETH_x_SHIELD 信号必须接至以太网外部插头的屏蔽层。

Reference design for connecting Ethernet ports to RJ45 connector with LEDs 连接以太网端口至设有状态 LED 的 RJ45 插头

Pixel Data Modes 像素数据模式

A nominal 65536 pixels can be controlled by the LED outputs on the R². Most standard PWM-enabled or static constant-current chips can be supported. Support for new ICs can usually be added if a comprehensive datasheet is provided. See for details.

Two signalling modes are supported - LVCMOS and LVDS.

R² 标称像素控制能力为65536，支持使用大多数标准 PWM 或静态恒流驱动 IC。若贵方提供具体数据手册/规格书，亦可对目前未使用的 IC 新增支持。

R²支持 LVCMOS 同 LVDS 两种信号模式。

LVCMOS Mode LVCMOS 模式

In LVCMOS mode up to 36 chains of LED driver ICs can be connected directly to the LED_DATA[x] pins on the R². This can be extended to up to 72 chains using Virtual Channels (see section for details). These 72 chains are equivalent to '24 RGB groups' in other receiver cards. Note that pins LED_DATA[35:32] are shared with other functions, so if these functions are required, the number of chains should be limited to 32 or fewer (or 64 or fewer when using Virtual Channels).

Each chain of driver ICs shares a data clock (LED_DCLK_A) and latch (LED_LATCH). In the case of PWM-enabled ICs, the LED_GCLK pin provides a greyscale clock, for constant current ICs it provides an active-low output enable signal.

There is no restriction on the arrangement of pixels or driver chips on each output channel. Designers are therefore free to interleave LEDs of different colours on the same driver IC chain, providing all ICs on a chain use the same configuration register settings. For best performance all used channels should drive the same number of ICs and pixels.

Scan multiplexing up to a 32:1 ratio is provided using the LED_SCAN[x] pins listed above. These signals should be considered as a 5-bit binary bus with SCAN[0] being the least significant bit. A binary decoder can be used in the panel to convert this binary bus into one-hot signals for enabling scan bank power supplies. It is recommended that the scan multiplexing ratio is as low as possible to avoid significantly reducing the refresh rate. As such, scan multiplex ratios above 16:1 are strongly discouraged.

The LED_DISCHARGE is an active-high signal which is asserted during the scan bank switching period. This signal can optionally be used to control dedicated power supply discharge circuitry on LED modules for ghosting elimination.

For driver ICs with internal configuration registers (for example those with programmable current gains), it is possible to specify a different value for the configuration register for each output channel. Different register values can not be programmed into different ICs on the same output channel.

Where it is necessary to fan-out signals to multiple modules or chains, for improved signal integrity it is recommended that the fan-out is placed immediately prior to a buffer or level-shifter. The outputs from R² should not be used directly to run over long traces/cables or multiple connectors. Instead appropriate buffers or level-shifters should be used. For best performance it is recommended that the same number of buffer or level-shifter stages are used on all signals in order to match the delay. For an example of level-shifting the R² outputs to 5V and fanning-out to multiple modules, see .

于 LVCMOS 模式下，最多36线 LED 驱动 IC 链可直接连接至 R² 的 LED_DATA[x] 端。使用虚拟模式可使串行数据数拓展至72线，详见章节。一些其他通用接收卡制造商以“RGB 数据组”表述此带载能力 - 该72线串行组将相当于24个 RGB 数据组。应注意 LED_DATA[35:32] 引针与其他一些功能共享，故若需启用此类功能，串行数据应限制小于32（64，若使用虚拟通道）组。

每组驱动 IC 链共享一个数据时钟（LED_DCLK_A）同锁存信号（LED_LATCH）。LED_GCLK 引针为 PWM 驱动 IC 提供灰度时钟信号；或低电平有效输出致能信号 - 若使用之驱动 IC 为恒流驱动 IC。

每组输出通道的像素点排布及驱动 IC 芯片的排列没有具体限制。单独每条驱动 IC 链允许交错使用不同颜色的 LED - 只要该链上每个 IC 使用相同的配置寄存器设置。为达致最佳性能，所有输出通道应驱动及带载同等数量的 IC 及像素点。

LED_SCAN[x] 信号可扫描控制最大32:1比率的驱动 IC 多路复用。该组信号应被视为最低有效位为 SCAN[0] 的 5位元二进制数。可使用二进制解码器将其解码为独热码（one-hot）以控制对扫描组的供电。使用过高复用比率将降低刷新率 - 建议使用小于16:1的比率。

高电平有效 LED_DISCHARGE 在扫描组转换期间为高电位（信号有效）。该信号可对模组专用电源放电电路进行控制以消除重影。

对带有内部配置寄存器的驱动 IC （例如带有可编程电流增益寄存器的 IC），可为每个输出通道设定不同设置值，但单个输出通道上所有 IC 必须使用相同寄存器设置值。

为提高信号完整度，建议当扇出信号至多个模组或数据链时，信号扇出应直接置于缓冲器或电压位准移位器前。R² 之输出应使用适配之缓冲器或电压位准移位器，不得直接接载过长之印刷电路线，引线或多个插接头。建议每路信号使用相同数量之缓冲器或电压位准移位器以匹配时延。请参考范例，见 - R² 5V输出移位多模组扇出。

Reference design for buffering and level shifting LED Driver signals to 5V 缓存及电平移位 - LED 驱动 5V 信号输出移位参考设计

LVDS Mode LVDS模式

LVDS Mode is not yet available on general release. If you are interested in using LVDS mode in your project please contact us for further information.

LVDS 模式于通用发布中不作说明。若阁下想在项目中使用 LVDS 模式，请联系我们以获取更多信息。

Supported Driver ICs 驱动支持

The R² currently supports many types of PWM-enabled driver ICs in LVCMOS and LVDS modes, and most static-type ICs in LVCMOS mode only. The current list of supported PWM-enabled driver ICs is as follows:

R² 目前支持多款 PWM 驱动 IC 使用 LVCMOS 或 LVDS 模式，及多数一般恒流驱动 IC - 但仅限 LVCMOS 模式。目前支持的 PWM 芯片目录如下：

Macroblock MBI5041 (version B)
Macroblock MBI5042
Macroblock MBI5042 (version B)
Macroblock MBI5043
Macroblock MBI5050
Macroblock MBI5051
Macroblock MBI5051 (version B)
Macroblock MBI5152
Macroblock MBI5153
Macroblock MBI5252
Macroblock MBI6023
Optotech DR3058
MY-Semi MY9221
MY-Semi MY9266
MY-Semi MY9269
MY-Semi MY9366

Other types of driver IC can usually be supported on request. Please contact us (supplying a full English-language datasheet) for further information.

若需支持其他驱动 IC，请提供完整英文数据表。请咨询我们获取更多信息。

Virtual Output Channels (LVCMOS Mode) 虚拟输出通道（LVCMOS模式）

Virtual output channels allow each data output on the R² card to drive two chains of driver ICs. This requires a small amount of additional circuitry on the panel's spine/hub board to split and route the signals accordingly. Virtual channels mode is primarily intended for retrofit applications where the existing panel design requires more than the 36 driver IC chains natively supported by R². Wherever possible the panel design should be modified to require 36 (or fewer) chains.

For example LED_DATA[0] can be routed to two chains providing the two chains are clocked using different DCLKs. An additional signal - LED_DCLK_B is provided for this purpose.

When splitting signals to feed to two independent chains of driver ICs, it is strongly recommended that the signals are buffered or registered immediately following the split in order to maintain signal integrity. Two additional signals - VIRTUAL_FF_CLK_A and VIRTUAL_FF_CLK_B - are provided to clock flip-flops for registering data into each of the virtual channels. All signal paths to each chain should have the same number of buffering stages to avoid adding skew between the signals.

In panels using PWM-enabled driver ICs the LED_LATCH signal should be split using the same method as the LED_DATA[x] signals. When using static driver ICs the LED_LATCH line should be fanned-out using a buffer. All other signals such as LED_GCLK and LED_SCAN[x] should always be fanned-out using buffers.

A reference design for using virtual channels is shown in . For further information and design assistance when using virtual channels please contact us.

虚拟通道允许每个 R² 数据输出驱动两条驱动IC链。脊板或转接板上的电路将需作少量改动作信号分离同分送，以实现此功能。该功能主要应用于更新同改进已有的高于36链驱动 IC 之显示屏设计 - 新设计应尽可能使用非虚拟输出最大36链驱动 IC。

示范： LED_DATA[0] 输出至两组使用不同数据时钟（DCLK）的驱动 IC - LED_DCLK_B 信号将为第二组数据提供数据时钟。

为保持信号完整性，强烈建议立即缓冲/寄存分离后的连接至两条独立的驱动 IC 链的信号。DDR_FF_CLK_A 和 DDR_FF_CLK_B 两个信号将分别提供触发器时钟信号用以寄存上述两条虚拟通道之独立数据。每条通道上的缓冲级数应保持一致以免造成输出间之偏差。

若使用 PWM 驱动 IC，LED_LATCH 信号应以分离 LED_DATA[x] 之相同办法分离。若使用一般静态驱动 IC，LED_LATCH 应使用缓冲器进行扇出。所有其他信号如 LED_GCLK 及 LED_SCAN[x] 等均应使用缓冲器扇出。

使用虚拟通道请参考之设计。如需更多信息及设计协助，请与我们联系。

Reference design for virtual channels 虚拟通道参考设计

User Interface Support 用户界面支持

The R² supports a range of different user interfaces, such as status LEDs and push buttons. The UI_TEST_BUTTON_N should be held low for >3s to enter/exit test pattern mode and pulsed low briefly to change test patterns. The UI_STATUS[x] pins can be used for connecting status LEDs and other types of user interface.

Our recommended user interface is a single full-colour RGB LED for indicating status and a single push button for enabling and changing test patterns. These should be connected to the UI_STATUS[x] and UI_TEST_BUTTON_N pins as suggested in . The various states indicated on the full-colour RGB LED when using the recommended scheme are documented in . Note that if the recommend scheme is used then UI_STATUS[0] should be left disconnected.

Other user interface types and features are supported on a case-by-case basis. Requests should be made by contacting us during the design phase for further details and confirmation of support.

R² 支持使用多种用户界面，如 LED 状态指示及用户功能按钮。保持低电平 3 秒以上接收卡将进入或退出测试图样模式 - 于该模式下，短促低电平脉冲将切换测试图样。UI_STATUS[x] 可连接至状态 LED 或其他用户界面指示显示屏工作状态。

我们推荐使用单个全彩 RGB LED 用作状态指示及单个用户按钮控制测试图样。图示范为 UI_STATUS[x] 同 UI_TEST_BUTTON_N 的连接。将介绍推荐方案的状态指示。若采用该推荐方案，请注意 UI_STATUS[0] 应处于断路状态。

其他用户界面种类同特殊功能或可度身定制 - 请于设计阶段提出具体要求以确认可行性。

Recommended user interface circuitry 建议用户界面电路

Card state 接收卡状态	Full-colour RGB LED colour 全彩 RGB LED 颜色
Card powered-down or REBOOT_N asserted 接收卡断电或 REBOOT_N 生效	UI_STATUS[x] lines will be floating, so LED colour will depend on pull-up/-down resistors. We recommend the resistors are arranged as per the reference schematic. UI_STATUS[x] 将浮空，LED 颜色将取决于上拉/下拉电阻。我们建议按以上参考原理图选用电阻。
Card rebooting 重启中	Red solid 固态红色
Error or over-temperature 出错或过热	Red flashing 红色闪烁
Card booted successfully (no Ethernet links established) 启动正常（无以太网连接建立）	Green solid 固态绿色
One Ethernet link established (not associated to processor) 单端口以太网连接建立（非处理器连接）	Single blue flash 蓝色单闪
Two Ethernet links established (not associated to processor) 双端口以太网连接建立（非处理器连接）	Double blue flash 蓝色双闪
Card successfully associated with processor 连接至处理器	Blue solid 固态蓝色
Test pattern mode enabled 测试图样模式	Yellow solid 固态黄色
Identify/beacon (used to help users identify individual panels) 识别/灯标（用以识别单个显示屏）	Yellow flashing 黄色闪烁

Full-colour RGB status LED states 全彩 RGB LED 状态指示

Sensors, Fans and Monitoring 传感器、排热扇及状态监控

R² supports the monitoring of external sensors, such as temperature sensors and accelerometers. Information from these sensors can then be reported back to users via the user interface of a Tessera Processor. Multiple sensors can be supported, including multiple of the same type. For example, manufacturers may wish to place temperature sensors in various locations across the panel.

We strongly recommend that at least one temperature sensor is connected to the R² and that this is placed in the same part of the panel's enclosure as the card.

The list of currently supported sensors is given in . Other types of sensor can usually be supported on request, please contact us for confirmation at the earliest opportunity. A reference design for connecting a temperature sensor and accelerometer is given in .

R² 支持使用外部传感器监控，如温度传感器和加速度计等。监测信息将通过 Tessera 处理器的用户界面报告用户。 R² 支持同时使用多个传感器，包括同一类型多个 - 如于显示屏各处布置多个温度传感器。

我们强烈建议至少安装一个温度传感器 - 置于显示屏壳内接收卡之相同安装位置。

表中为目前支持的传感器目录。其他类型的传感器可按需提供支持，请及早咨询以确认可行性。请参考设计温度传感器及加速度计之连接。

Part 元件	Type 种类	R² pins R² 针脚
Texas Instruments LM73	Temperature sensor 温度传感器	I2C_1_SDA/_SCL
Sensirion SHT20	Temperature and humidity sensor 温度及湿度传感器	I2C_1_SDA/_SCL
Freescale MMA8453Q	Accelerometer (for rotation reporting) 加速度计（用于转向测控）	I2C_1_SDA/_SCL and I2C_INT
Maxim MAX6650	Fan speed regulator and monitor 风扇转速调节及监测	I2C_1_SDA/_SCL and I2C_INT

Supported sensor parts 目前支持的传感器

Reference design for connecting temperature sensor and accelerometer 温度传感器及加速度计连接参考设计

R² has built-in fan speed control and speed monitoring capabilities. For more information please contact us.

R² 自带风扇转速调节及监测功能，请联系我们获取更多信息。

Per-Pixel Calibration 逐点校正

R² supports the Tessera Calibration System for applying full colour per-LED corrections to make the panel display specific colours and appear more uniform. Calibration data can be stored in the card's internal flash memory, or it can be retrieved from external storage, such as an EEPROM or flash device on each module.

Wherever possible, using storage on the module is preferable as modules can be moved between panels without having to worry about re-programming calibration data. R² supports both EEPROM and flash devices for storage. Both SPI and I2C interfaces are also supported for retrieving the data, though I2C is only recommended for legacy appications.

These options are described in more detail below.

R² 支持使用 Tessera Calibration System 校正系统执行全彩 LED 逐点校正，以达到特定颜色效果并使其更加均匀。校正数据可以存储于接收卡的内部闪存，或外部存储设备 - 每个模组的 EEPROM 或闪存中。

在可能之情况下应尽量使用模组上的存储器 - 此举可省却模组切换后校正数据的重新编写。 R² 支持使用 EEPROM 及闪存作存储设备，数据存取可使用 SPI 及 I2C 介面，但建议仅使用 I2C 于旧版兼容之用途。

以下章节将详细讲解这些方案。

External Storage 外部存储

Typically the external storage mode will be used when there is a storage device on each module. However, it could also be used in cases where it is not possible to put devices on the modules themselves, but the pixel count is too high to use internal storage mode.

Both EEPROM and flash devices are supported for external storage. EEPROM devices are usually preferable due to their simplicity, but large capacity parts are generally not available, in which case a flash device should be used. The list of currently supported device families is given in . Other parts can sometimes be supported on request - please contact us for confirmation at the earliest opportunity.

外部存储模式通常用于模组带有存储设备之情况下，或于模组无自带存储设备但显示屏总像素过高导致数据未能装入内部存储的情况下。

EEPROM 同闪存设备均于受支持之列 - 使用 EEPROM 设计将较为简便，但因其容量有限，若设计需要使用大容量存储则应考虑使用闪存。中为目前支持的设备目录。其他存储可按需提供支持，请及早咨询以确认可行性

Device type 设备种类	Supported parts 支持元件
SPI Flash 闪存	Micron M25P or Winbond W25X series 系列
SPI EEPROM	Atmel AT25 series (or equivalent) 系列（或同类产品）
I2C EEPROM	Atmel AT24C series (or equivalent) 系列（或同类产品）

Supported storage devices 支持的储存设备目录

The recommended max pixel count for a given size of storage device is given in . This refers to the recommended maximum number of pixels per device, so if there is a storage device per module then this should be considered the pixel count limit for the module, not the entire panel. These recommendations are based on storing up to two calibrations, each containing both correction coefficients and raw measurements, assuming EEPROM is used for device sizes 2Mb and below. If you have specific requirements for calibration please contact us to discuss them as in some cases it may be advisable to use a larger storage device than those listed.

对特定容量之设备，建议最大支持像素请参考。该数字指示每个存储设备建议的最大像素点 - 若每个模组均配有存储器，像素点数目应为该单个模组之像素数目，而非整屏之像素数目。表列数据基于使用/存储最大两组校正标定，每组标定包含所有校正参数及原始测量值，默认 2Mb 以下之存储器为 EEPROM 。某些情况下可能需要比表列设备更大容量的存储器 - 若对校正组有特殊要求请与我们联系。

Storage device size 存储设备容量	Recommended max pixel count per device 单个设备建议最大像素数目
16Mb	25000
8Mb	12000
4Mb	6000
2Mb	3000
1Mb	1500
512Kb	700
256Kb	300
128Kb	150

Recommended storage device sizes 建议存储设备容量

In LVCMOS mode, R² interfaces with external devices using the CAL_I2C_SPI[x] pins. These are mapped to an I2C or SPI interface as described in . For new designs, especially with high pixel counts, SPI interfaces are recommended as they are higher bandwidth than I2C, which reduces boot times. SPI also tends to be more reliable than I2C. shows an example circuit for connecting these pins to four SPI storage devices, for example for panels with four modules. If you are intending to use other modes, including I2C, please contact us for more information and a reference design.

For panels with more than four modules, up to sixteen SPI buses can be supported using a small external multiplexing circuit. Please contact us to request a reference design.

In LVDS mode, the LVDS links to each module are used to communicate with external storage devices. LVDS Mode is not yet available on general release. If you are interested in using LVDS mode in your project please contact us for further information.

于 LVCMOS 模式下，R² 将与外置存储设备以 CAL_I2C_SPI[x] 引脚连接。该类引脚将匹配至单个 I2C 或 SPI 界面如所述。新设计推荐使用 SPI，尤其当像素点较高之情况下 - 其带宽高于 I2C，因此将缩短启动时间。SPI 亦相比 I2C 较为稳定。为与4个 SPI 存储设备（显示屏使用4个模组）连接之电路示范。若阁下有意使用其他模式（包括 I2C），请联系我们索取更多信息及参考设计。

对使用大于4个模组的显示屏，使用一个小型外部电路可支持最大16组 SPI 总线。请联系我们索取参考设计。

于 LVDS 模式下，连接到单个模组的 LVDS 连接将用于与外部存储设备之间的通信。通用发布中 LVDS 模式暂不使用。若阁下在项目中有意使用 LVDS 模式，请联系我们以获取更多信息。

R² pin R² 引脚	SPI four module interface SPI 四模组接口	SPI external multiplexer interface SPI 外置数据选择器接口	I2C four module interface I2C 四模组接口	I2C external multiplexer interface I2C 外置数据选择器接口	UART interface UART 接口
CAL_I2C_SPI[0]	MOSI	MOSI	RESERVED - do not connect 不可连接	RESERVED - do not connect 不可连接	RESERVED - do not connect 不可连接
CAL_I2C_SPI[1]	CLK	CLK	SDA_OUT[3]	DIR	RESERVED - do not connect 不可连接
CAL_I2C_SPI[2]	MISO[0]	MISO	SCL_OUT	SCL_OUT	RX[0]
CAL_I2C_SPI[3]	SS_N[0]	SS_N	SDA_IN[0]	SCL_IN	TX[0]
CAL_I2C_SPI[4]	MISO[1]	RESERVED - do not connect 不可连接	SDA_OUT[0]	SDA_OUT	RX[1]
CAL_I2C_SPI[5]	SS_N[1]	MUX[4]	SDA_IN[1]	SDA_IN	TX[1]
CAL_I2C_SPI[6]	MISO[2]	MUX[0]	SDA_OUT[1]	SDA_MUX[0]	RX[2]
CAL_I2C_SPI[7]	SS_N[2]	MUX[1]	SDA_IN[2]	SDA_MUX[1]	TX[2]
CAL_I2C_SPI[8]	MISO[3]	MUX[2]	SDA_OUT[2]	SDA_MUX[2]	RX[3]
CAL_I2C_SPI[9]	SS_N[3]	MUX[3]	SDA_IN[3]	SDA_MUX[3]	TX[3]

Note: I2C and UART modes should not be used without prior consultation.

注：请提前咨询使用 I2C 及 UART 模式。

Mapping of CAL_I2C_SPI[x] pins to SPI, I2C or UART interfaces (LVCMOS mode only). SPI，I2C 或 SPI 接口（仅限LVCMOS模式）的 CAL_I2C_SPI[x] 功能对照

Reference design for connecting four calibration devices using SPI 4组校正数据存储设备连接设计参考

Internal Storage 内部存储

If no external storage is available, it is possible to store calibration data in the R² card's internal flash. The storage space available is limited, and therefore it may not be possible to store multiple calibration banks in internal storage. Internal storage does not currently support storing calibration data for more than 16384 pixels.

在外部存储不可用之情况下，校正数据可存储于 R² 的内部闪存内。目前每个校正组仅支持存储最大16384像素的校正数据 - 因该存储器容量有限，多组储存将受限制。

Design Process 设计流程

We are happy to partner with panel manufacturers directly or via an end customer such as rental company.

During the design process there should be an ongoing dialogue between us and our partners, usually including direct communication with the panel manufacturer. This is to ensure that our partners get the results they want from the Tessera processing and it enables us to ensure that the Tessera brand remains a mark of quality for LED video processing.

We respect our partners' need for confidentiality and we ask our partners not to disclose proprietary information about our technology. Sometimes it will be necessary to enter into a mutual non-disclosure agreement (NDA) with partners. If a partner would like to be covered by an NDA then they should notify us at the earliest opportunity.

A typical design process would be as follows:

我方乐意直接或通过租赁公司等终端客户间接之方式与显示屏生产商成为合作伙伴。

为保证达到合作方期望之理想效果，设计期间合作各方应保持对话，包括与生产商之直接洽谈。此举亦为维护 Tessera 于 LED 视频处理领域始终保持其优质品牌。

我方尊重合作方之保密需求，亦同时要求合作方不作对我方所有技术之公开。必要时合作双方应签署双边保密协议(NDA) - 若合作方希望受 NDA 协议保护，请及早对我公司提出要求。

设计流程：

Initiation 项目启动

It is essential that partners make contact with us at the start of the design process. Partners should tell us as much as possible about the product into which Tessera processing is being integrated so that we can best support the design process. We can then make any specific recommendations which may differ from the general guidance offered in this document.

设计开展初段合作方应尽可能多地向我方提供意欲使用 Tessera 处理技术之产品之相关资讯 - 为对设计提供最大程度支持，此为关键。我方将对设计之一般性指引作出具体建议。

Design Creation and Review 创建与审核

Partners should use the technical information in this document to integrate Tessera processing into their design. We encourage partners to contact us should any clarification or additional guidance be required. In some sections of this document it is requested that partners contact us to confirm that there is support for certain features, for example particular external peripherals. It is important that this is done at the earliest opportunity.

Once the design is complete we are happy to review schematics for incompatibilities. This service is usually complementary and subject to the availability of engineers' time.

合作方应使用本技术手册之信息设计并集成 Tessera 处理技术。如需额外说明指导，我方欢迎合作方随时联系。该手册之个别章节要求合作方与我方联络以确认支持性同可行性 - 如特殊外接设备等 - 请及早与我方确认。设计完成后，我方将审核原理图以确认兼容及可行性 - 此服务通常于合作中包含，具体时间将取决于工程师安排。

Prototyping 原型制作

After schematic review partners should proceed to produce a small number of prototype panels. During this time we will create a Configuration for the panel. This is the file that tells the R² card how to control the panel, and includes information such as the type of driver IC and the ordering of the LEDs. We ask that a couple of these prototypes are then sent to us so that we can test the Configuration and tune accordingly.

If necessary we are often able to provide 'light-up' firmware so that partners can run basic tests on the panel before sending them to us.

Once Configuration testing is complete we will supply these files and tools to the partner so that they can program the R² card and complete their prototype validation and testing.

原理图审查之后，合作方应开始生产少量显示屏模型。于此期间我方将为该显示屏创建配置设置。该配置文件信息包含 LED 数量和 LED 驱动 IC 型号等，用以启用接收卡对显示屏的控制。合作方应向我方提供少量此类原型，以便我方测试及调整配置文件。在此之前，如有需要我方可提供用以点亮模组的固件，合作方可先行作出基本测试。配置文件测试完成后我方将为合作方提供该文件及相关工具 - 用以完成合作方之原型检验及测试。

Production and Ongoing Support 生产与后续支持

We ask that partners let us retain one or two panels (or supply us with production panels if sufficiently different) so that we can provide ongoing support to our end-users. The Tessera software and firmware is constantly evolving as new features are added, so this also lets us check that new features work correctly on all partners' panels.

If calibration is required we will discuss the options with partners and assist them in establishing appropriate manufacturing and calibration procedures.

合作方应允许我方保留一至两个该类显示屏（或提供量产型 - 若其与设计原型有较大差异）以便我方为终端用户提供后续支持。Tessera 软件及固件均在不断更新改进，此举亦有利于我方确保新功能的正常使用。如有必要进行校正，我方将与合作方协商具体办法并协助其制定正确之生产与校正。

Sales and Support 销售及支持

For further information or to purchase Tessera processing, please contact us.
Email: info@bromptontech.com
Telephone: +44 (0)20 7471 9244

若需获取更多资讯或订购 Tessera 视频处理技术，请与我们联系。
电邮：info@bromptontech.com
电话：+44 (0)20 7471 9244

Revision History 修订记录

Revision 校订	Date 日期	Comments 说明
1	22 September 2014	Preliminary release for internal review 草案内部审定
2	9 October 2014	First release to customers 首度用户发布
3	17 October 2014	Adding virtual channels reference design 新增虚拟通道参考设计
4	11 December 2014	Updating supported driver ICs. Recommending that reverse-mounted connectors are not used. 更新支持IC列表建议设计使用非反向安置插槽
5	19 December 2014	Added scan multiplex ratios up to 32:1 增加扫控多路复用比率32:1
6	27 January 2015	Added pin options for LED_DATA[35:32] 增加 LED_DATA[35:32] 引脚使用选项
7	27 February 2015	Updated , and . Added UART mode to . 更新 , 同。增加 UART 模式至 .
8	9 July 2015	Formatting changes only - no changes to content. 格式调整，未作内容变更
9	10 July 2015	Added subscription information. 增加订阅资讯
10	17 August 2015	Changed location of LED_DATA[34] and LED_DATA[35] pins to enable simultaneous use with LED_SCAN[3] and LED_SCAN[4]. Removed FAN_CONTROL and FAN_STATUS pins, and added RESERVED_GPIO[x] pins. Minor text corrections and clarifications. LED_DATA[34] 与 LED_DATA[35] 引脚位置变动以实现 LED_SCAN[3] 及 LED_SCAN[4] 同时使用移除 FAN_CONTROL 及 FAN_STATUS，加入 RESERVED_GPIO[x] 少量案文修改及说明
11	14 September 2015	Correcting typographical error. 排印勘误
12	12 April 2016	Adding Chinese translation, updating figures and fixing typographical errors. Updating supported driver IC list. Adding debug header. 新增中文译本，图表更新及排印勘误更新支持 IC 列表新增调试管座
13	9 August 2016	Adding new I2C four module mode. Shortened calibration function names for readability. Calibration text clarifications. Updated to allow for new OSCA feature. 新增 I2C 四模组模式为可读性更新校正功能各名称释义校正功能文段更新以支持 OSCA 功能

Tessera R2